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Espressif Systems /ESP32-S2 /UART0 /MEM_CONF

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Interpret as MEM_CONF

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RX_SIZE 0TX_SIZE 0RX_FLOW_THRHD0RX_TOUT_THRHD0 (MEM_FORCE_PD)MEM_FORCE_PD 0 (MEM_FORCE_PU)MEM_FORCE_PU

Description

UART threshold and allocation configuration

Fields

RX_SIZE

This register is used to configure the amount of RAM allocated for RX FIFO. The default number is 128 bytes.
TX_SIZE

This register is used to configure the amount of RAM allocated for TX FIFO. The default number is 128 bytes.
RX_FLOW_THRHD

This register is used to configure the maximum amount of data bytes that can be received when hardware flow control works.
RX_TOUT_THRHD

This register is used to configure the threshold time that the receiver takes to receive one byte, in the unit of bit time (the time it takes to transfer one bit). The UART_RXFIFO_TOUT_INT interrupt will be triggered when the receiver takes more time to receive one byte with UART RX_TOUT_EN set to 1.
MEM_FORCE_PD

Set this bit to force power down UART RAM.
MEM_FORCE_PU

Set this bit to force power up UART RAM.

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data